Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[STA] OCV & Clock Uncertainty

Status
Not open for further replies.

ivlsi

Advanced Member level 3
Joined
Feb 17, 2012
Messages
883
Helped
17
Reputation
32
Reaction score
16
Trophy points
1,298
Activity points
6,868
Hi All,

Should Clock Uncertainty be applied during OCV analysis ?

Thank you!
 

Clock uncertainty is for clock jitter .. and OCV analysis is totally different.

one should not mix up the things ... they are for different reason.
Rahul
 

Doesn't Clock Uncertainty represent timing variations due to the Clock Tree insertion?
 

Doesn't Clock Uncertainty represent timing variations due to the Clock Tree insertion?

What do you mean by timing variation .. clock uncertainty is a factor used in calculating timing ..
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top