I would assume that the code is executed out of the flash memory rather moved to RAM. In this case, the RAM #WR signal won't be pulled low before a write access to XRAM memory happens in the code.
To allow usage of the RAM as code memory, it must be read selected by #PSEN with some kind of banking logic switching between flash and RAM. Not impossible but rather unusual.
If you want to discuss this in detail, you should provide a schematic of actual flash and RAM connections to 8032.