SRAM problem Spartan 3

[moottii]

Hello friends,
Could you please introduce some sources of operation of SRAM asynchronous or please explain how does it work?I searched, but I couldn't find useful tutorial.
For example: for writing operation what should be done?
I wanna implement BIST(built-in self-test) for SRAM on Spartan 3 FPGA.(SRAM model: K6R100V1C)

 

[ads_ee]

I didn't find anything on a K6R100V1C SRAM. Do you have a datasheet?

 

[moottii]

No, I don't have.
The only thing that I have is the pin number which indicates : [A16:A0] , [I/O8:I/O1], /CS, /OE, /WE.
have you experienced working with SRAM? if yes, what should be done for writing/reading operations for a typical SRAM?

 

[rberek]

Type "asynchronous SRAM write" into Google and the first hit is a PDF tutorial from Cypress on SRAMS with sn explanation of how they work complete with timing diagrams. You can find it here.
**broken link removed**

r.b.