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Sram array power dissipation

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O

oly

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I want to know that if i will create a 6T sram array of 2x2 then if i want to calculate the power dissipation then how can i do this? i know how to calculate the power dissipation for the cell. but i want to know that how to calculate power dissipation for the array means for the architecture including sense amplifier,write column circuit,row decoder and column decoder?
 

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