Hi,
.. somthing like this is possible for a fixed value compare like the counter_top: 0x9C3 = 2499,
but it will fail with variable compares like the duty_cycle.
For the duty_cycle compare all 12 counter bits ... pluse the 12 bit compare result ... need to settle before the next rising clock edge.
Especially when the counter_value changes from 0x7FF to 0x800 all 12 bits change.
So a carry_look_ahead or a similar solution is difficult.
Klaus
I wasn't suggesting carry look ahead or similar, the key is pipelining, you pipeline the compares for values before the one you want, then pipeline the comparison results to check if you've reached a specific value.
to check for 0x800 you would..
start with count at 0x7FE and perform the following compares
cmpr_u <= (cnt[11:8] == 7);
cmpr_m <= (cnt[7:4] == F);
cmpr_l <= (cnt[3:0] == E);
1st clock cycle, count changes to 0x7FF and the cmpr_# values get registered
eq_0x800 <= cmpr_u & cmpr_m & cmpr_l;
2nd clock cycle, count is now 0x800 and the eq_0x800 is set.
This only gets messy if you have a requirement to enable disable the counting, which doesn't seem to be the case in this situation as the counter appears to be free running.