void SPIFlashInit2(void){
BYTE i;
volatile BYTE Dummy;
BYTE vSPIONSave;
WORD SPICON1Save;
// Save SPI state (clock speed)
SPICON1Save = SPIFLASH_SPICON1;
vSPIONSave = SPI_ON_BIT;
// Configure SPI
SPI_ON_BIT = 0;
SPIFLASH_SPICON1 = PROPER_SPICON1;
ClearSPIDoneFlag();
SPIFLASH_SPICON2 = 0;
SPIFLASH_SPISTAT = 0; // clear SPI
SPI_ON_BIT = 1;
// Read Device ID code to determine supported device capabilities/instructions
{
// Activate chip select
SPIFLASH_CS_IO = 0;
ClearSPIDoneFlag();
// _SPI1BRG=1; //
// Send instruction
SPIFLASH_SSPBUF = RDID;
WaitForDataByte();
Dummy = SPIFLASH_SSPBUF;
// Send 3 byte address (0x000000), discard Manufacture ID, get Device ID
for( i=0;i<5;i++ ){
SPIFLASH_SSPBUF = 0x00;
WaitForDataByte();
Dummy = SPIFLASH_SSPBUF;
}
// Deactivate chip select
SPIFLASH_CS_IO = 1;
// Decode Device Capabilities Flags from Device ID
Device2.v = 0x00;
switch(Dummy){
case 0x41: //SST25LF016B
Device2.bits.bWriteWordStream = 1;
break;
case 0x43: // SST25LF020(A) (2 Mbit) 0xAF, 14us, AAI Byte
case 0x48: // SST25VF512(A) (512 Kbit) 0xAF, 14us, AAI Byte
case 0x49: // SST25VF010A (1 Mbit) 0xAF, 14us, AAI Byte
Device2.bits.bWriteByteStream = 1;
break;
case 0x4B: // SST25VF064C (64 Mbit) 0x02, 1.5ms/256 byte page, no AAI
Device2.bits.bPageProgram = 1;
break;
case 0x8E: // SST25VF080B (8 Mbit) 0xAD, 7us, AAI Word
Device2.bits.bWriteWordStream = 1;
break;
}
}
// Clear any pre-existing AAI write mode
// This may occur if the PIC is reset during a write, but the Flash is
// not tied to the same hardware reset.
_SendCmd(WRDI);
// Execute Enable-Write-Status-Register (EWSR) instruction
_SendCmd(EWSR);
// Clear Write-Protect on all memory locations
SPIFLASH_CS_IO = 0;
SPIFLASH_SSPBUF = WRSR;
WaitForDataByte();
Dummy = SPIFLASH_SSPBUF;
SPIFLASH_SSPBUF = 0x00; // Clear all block protect bits
WaitForDataByte();
Dummy = SPIFLASH_SSPBUF;
SPIFLASH_CS_IO = 1;
// Restore SPI state
SPI_ON_BIT = 0;
SPIFLASH_SPICON1 = SPICON1Save;
SPI_ON_BIT = vSPIONSave;
}