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Speed grade selection and complie result?

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csjedi

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I am using Actel's A3P250 FPGA in my project. The chip I am using is -Std speed grade, but in Synplify and Designer I set the speed grade to -2. After I downloaded the program, it seems work well.
I wonder how does speed grade selection affect the compile result? Or does it only affect the simulation result?

Besides, I compared the synthesis results(Technology view) between selecting industrail and automotive temperature grades, and found many differences. What will happen if I downloaded a program complied with automotive grade selection to an industrial chip?
 

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