Jun 8, 2004 #1 V vvsvv Full Member level 1 Joined May 26, 2004 Messages 98 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Activity points 796 how to design the jtag interface of a FPGA system? in this system ,one spartan2e chip was used!!!!! may u give me some advice when I design the pcb ? thanks!! :?
how to design the jtag interface of a FPGA system? in this system ,one spartan2e chip was used!!!!! may u give me some advice when I design the pcb ? thanks!! :?
Jun 10, 2004 #2 E echo47 Advanced Member level 6 Joined Apr 7, 2002 Messages 3,933 Helped 638 Reputation 1,274 Reaction score 90 Trophy points 1,328 Location USA Activity points 33,176 We designed our FPGA/CPLD/DSP boards with a small connector that talks to the Xilinx Parallel Cable IV. Try starting here: **broken link removed**
We designed our FPGA/CPLD/DSP boards with a small connector that talks to the Xilinx Parallel Cable IV. Try starting here: **broken link removed**