The delay must be longer for slower rpm, and shorter for high rpm. This is not obvious to achieve.
In the spirit of experimentation...
I assembled a simulation which illustrates a possible way to achieve the 10-degree delay.
1) The TDC pulse is fed to a frequency-to-voltage converter. This consists of a 555 configured as a one-shot, followed by an averaging capacitor.
2) The output is applied to a capacitor (ramp capacitor). The capacitor charges faster in proportion to engine rpm.
3) When it charges to a particular volt level, the comparator triggers. It triggers sooner when engine rpm is higher.
4) the ramp capacitor is discharged.
The scope traces show:
1) the TDC pulse (I chose 1% duty cycle, not knowing how long it lasts).
2) output from the 555 IC.
3) volt level on C3 (F-to-V capacitor).
4) volt level on C4 (ramp capacitor).
5) comparator output.
It will need a lot of adjusting in order to make it operate properly.