source fed mixer problems

[rfndmw]

hi..I have designed a source fed FET mixer...I am aware of the biasing region for this type of mixers...when I tested the designed mixer however, I found tht it gave lowest conversion loss at drain voltage almost 0 i.e. at 0.1 V. but I had designed the mixer for an operating point of drain voltage at about 2 V. the reuslts are really bad and I believe its because the transistor is nt being biased properly..am I right or could smethng else be the reason for the drain voltage shift I see. could sme1 plz tell me how to calculate the correct values of the shunt gate resistor I use to supply to gate voltage(and fr stabilizing) and the drain resistor via which I apply the drain voltage for this kind of mixer...any help would be appreciated...thnx

 

[vfone]

What about sweeping the gate bias and plot the drain output..

For best conversion gain an active mixer doesn’t need only proper bias, but also proper matching at RF and LO input and IF output.

 

[rfndmw]

thnx fr the reply...well..the point is its a wideband mixer and it is giving about the same amount of loss in the entire frequency range I designed it on...so I'm assuming tht the matching part is okay...thts basically the reason I'm nt understanding the change in the bias voltages I'm having to supply..would appreciate ur take on this..

Added after 2 minutes:

and one more thng..I now believe theres definitely smethng wrong with the biasing circuit only since I'm hardly getting any drain current when I measure it after biasing..anyway...I'd appreciate any suggestion or advise on this..