It really depends what your goals are.
If you have already selected which FPGA you want to use, and you think it will take a significant % (like 50%+) of your chip to implement, then HDL coder will not give you an optimal solution. You will have to hand code the design to get it to fit. It also is not very good at defining interfaces and multiple clock domains (and basically impossible when you have asynchronous clocks). it is also not very easy to produce scalable designs.
But if your goal is to produce a rapid prototype to help speed up simulation time, this is what HDL coder is good for. It may be convenient to use, but a hand coded solution will be needed to fit in tight spaces.
Personally, I think Simulink can act as an excellent Architectural tool, and it will allow you to bring hand coded VHDL into higher level simulink testbenches via co-simulation, and verify your hand coded block act the same as the simulink blocks using black box testing methodology.
So, decide what your goal is. It will also depend what experience you have you existing FPGA design. Because Im a hardware engineer, having done plenty of previous HDL using modelsim for design and verification, I find simulink lacking when it comes to debugging control signals conpared to modelsim.
But your milage may vary.