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SmartFusion issue accessing SPI flash at high speeds

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cipherstream

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AT25DF641 Datasheet:
https://www.adestotech.com/sites/default/files/datasheets/doc3680.pdf

SmartFusion MSS SPI Driver User's Guide v2.1:
https://www.microsemi.com/document-portal/doc_view/130877-mss-spi-driver-ug


I am attempting to access a slave SPI flash chip using a SmartFusion chip as the SPI master. I can do so successfully at speeds up to 6.25MHz, however when I try faster speeds I get back zeros instead of the correct data. From what I can tell the SmartFusion should be able to access it at speeds up to 50MHz. Obviously I would prefer flash access to be as fast as possible so that big reads/writes don't take very long.


I am using the SmartFusion A2F200 Eval board which has an onboard Atmel AT25DF641 SPI flash chip connected to SPI0. According to page 1 of the AT25DF641 datasheet this flash chip supports speeds up to 75MHz and supports SPI mode 0 and mode 3. Also page 8 of the datasheet states that this chip can handle the "Read Manufacturer and Device ID" command up to 75Mhz. I figure the "Read ID" command is a good one for testing SPI access as I always know what it should return.


While reading through the "SmartFusion MSS SPI Driver User's Guide v2.1" there are some notes on pages 12 and 13 that are important. Firstly they state that when doing "block transfers", the Chip Select line is de-asserted between bytes for modes 0 and 2. For this reason mode 0 is not usable to access the SPI flash. Secondly they state that there is a potential problem with block transfers de-asserting the Chip Select line if a high priority interrupt is serviced while an SPI transfer is in place. The eval board is made using the Chip Select line connected, however my test code is very simple running on the bare metal and only sets up SPI and UART so hopefully this is not an issue.


I setup the SmartFusion clocks to use the "On-Chip RC Oscillator" which runs at 100MHz, and I bypass the PLL to provide the 100MHz direct to the APB bus that the SPI is on.

I then init the SPI hw in my code as:

Code:
	// Init SPI bus that has onboard flash attached.
	// We are acting as master to the 1 slave device.
	MSS_SPI_init(&g_mss_spi0);
	MSS_SPI_configure_master_mode(&g_mss_spi0,
			MSS_SPI_SLAVE_0,
			MSS_SPI_MODE3,			// must use mode3 since mode0 de-asserts CS
//			MSS_SPI_PCLK_DIV_16,		// this works
//			MSS_SPI_PCLK_DIV_8,		// this doesnt work
//			MSS_SPI_PCLK_DIV_2,		// this is what I want to use
			MSS_SPI_PCLK_DIV_16,
			MSS_SPI_BLOCK_TRANSFER_FRAME_SIZE);

I then send the "Read ID" command to the SPI flash by doing:

Code:
	// Send command to SPI0-slave0
	uint8_t spi_out[1] = { 0x9F };
	uint8_t spi_in[3] = { 0 };
	MSS_SPI_set_slave_select(&g_mss_spi0, MSS_SPI_SLAVE_0);
	MSS_SPI_transfer_block(&g_mss_spi0,
			spi_out, sizeof(spi_out),
			spi_in, sizeof(spi_in));
	MSS_SPI_clear_slave_select(&g_mss_spi0, MSS_SPI_SLAVE_0);

This code works if I call MSS_SPI_configure_master_mode() passing in the parameter MSS_SPI_PCLK_DIV_16, however if I try to use MSS_SPI_PCLK_DIV_8 or less I receive all zeros.

Since the bus is running at 100MHz these parameters would give SPI access speeds of:

MSS_SPI_PCLK_DIV_16 = 100/16 = 6.25MHz
MSS_SPI_PCLK_DIV_8 = 100/ 8 = 12.50MHz
MSS_SPI_PCLK_DIV_4 = 100/ 4 = 25.00MHz
MSS_SPI_PCLK_DIV_2 = 100/ 2 = 50.00MHz

According to the AT25DF641 datasheet the SPI flash should be able to be accessed up to 75MHz, so even using MSS_SPI_PCLK_DIV_2 to give an access speed of 50MHz should work.

Any ideas why it does not work for me?

Do you think that using the "On-Chip RC Oscillator" is not providing a stable enough clock?
 

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