small IP core in altera cpld?

[7rots51]

Hi
I am new in cpld and fpga,I have hdlc ip core from openc0res and want to compile it and program it to an altera max7000 cpls,please someone guide me to do that,how many steps I must do ,can you specify the steps for doing this job.This may help me to find the way in short time.(The time is critical for me)

I want to use this cpld chip as a hdlc controller (there is no hdlc chip in my country).

bye

 

[sibi]

Hi,
Since you said you are new to CPLD let us start from the beginning.

1. You will need MAX+plus II baseline software. This is some 10MB and you can download it freely from Altera.

2. Next you need a byte-blaster MV download cable. You can make one. The schematics are available at Altara site Or if you are pressed for time you may order it. It costs around $150

3. Install drivers for byte-blaster in MAX+plus. It may take days if you don't have the correct literature. A application note on installing ByteBlaster driver for NT/XP is available at Altera

4. Next open the IP core. I assume it is in AHDL. You need to select teh target device and compile the project. Next assign pins using Floor Plan Editor. Recompile the project

5. Programme your device using "Programmer". You need to setup a Multi-Device JTAG Chain and programme with the .pof file.

OK, that was a primer.
Happy programming
Sibi