Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Slew rate control of I/O buffers

Status
Not open for further replies.

AMS012

Full Member level 3
Joined
Oct 29, 2012
Messages
162
Helped
36
Reputation
72
Reaction score
36
Trophy points
1,308
Location
India
Activity points
2,185
Hi

Is there any way to control the slew rate of I/O buffers (assume a chain of inverters for simplicity) to bring it to a particular range across temperature variations?

Thanks
 

erikl

Super Moderator
Staff member
Joined
Sep 9, 2008
Messages
8,112
Helped
2,686
Reputation
5,352
Reaction score
2,284
Trophy points
1,393
Location
Germany
Activity points
44,153
You could use PTAT currents, or resistors with negative TC.
 

dick_freebird

Advanced Member level 5
Joined
Mar 4, 2008
Messages
6,917
Helped
2,025
Reputation
4,054
Reaction score
1,865
Trophy points
1,393
Location
USA
Activity points
55,385
The cheap and dirty way for slew rate control is a series
gate resistor on the final sink and source devices. That
scheme has variabilities from Rg, Cdg and Vdd. If you
want something super controlled you're probably talking
a closed loop, quasi-integrator type feedback with a
reference, and this is unlikely to support high speeds
well.

How "particular" your range is will determine how heroic
the measures..
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top