analog_chip
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Hi,
A single ended common source stage with PMOS current source load has a high Z O/P node. Is it OK to drive a load (say cap) ? Since it is a high Z node the voltage may jump to gnd or vdd due to process variation and either can go to triode.
Also is it OK to have a high Z node in a circuit? or some mechanism to stabilise. I understand cmfb but that is for differential,
A single ended common source stage with PMOS current source load has a high Z O/P node. Is it OK to drive a load (say cap) ? Since it is a high Z node the voltage may jump to gnd or vdd due to process variation and either can go to triode.
Also is it OK to have a high Z node in a circuit? or some mechanism to stabilise. I understand cmfb but that is for differential,