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Simulation of SCR in snapback region

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guderaghuram

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Hi. I'm trying to simulate the snapback region for the SCR. Can we able to simulate the snapback region. Is there any open source tool which can support simulating the snapback region. I tried using LTspice for simulating the scr circuit the as Current(I) keep on increasing the Voltage(V) apart from coming back to the snapback region. Any suggestions?
 

dick_freebird

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The problem is likely in the parameterization of the elements
(NPN, PNP, their base shunt resistances, the variation of these
with actual layout form). At least one of these devices is not
going to be a PDK supported model most likely (lateral) and
a well transistor you can expect to be highly variable and
poorly fitted.
 

guderaghuram

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Thanks for your reply. You mean that the NPN or PNP models which i'm using aren't proper, And can I know how can we overcome this problem? I tried using various models of PNP and NPN models but still the problem prevails. Is there any method where I can simulate SCR model for which I can obtain the respective values of the current and voltage at which the model jumps back to the snapback region?
 

dick_freebird

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Your snapback holding voltage (@ current) is going to be dominated
by the base shunt resistance(s). These are in fact a distributed
resistance and the parasitic BJTs, distributed as well. This may
make the snapback less crisp in reality than a lumped circuit.

A SCR primitive model will not include the base shunt resistances
although it may contain series "gate" resistances.

BJT models I have used (older ones) never did show a realistic
breakdown. You may have to supplement the transistors with
a diode model, where BV and ISRL, ISRH etc. work to emulate
body current injection which is the trigger mechanism.
 

guderaghuram

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Thanks a lot. Ya got it may be that holding voltage is dominated by the shunt resistance. I Will try to simulate the circuit by incorporating transistors with series of diode's. Hope the solutions works...
 

esd2008

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SCR can not be simulated using circuit simulation. The results won't be reliable
 

guderaghuram

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esd2008 thanks for the reply. What is the best way to do scr circuit simulation?
 

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