Simulation in user friendly language

[priyanka22]

Hello Everyone :smile:

I am using Xillinx ISE suit for ASIC designing. I am able to show my simulation results in machine(0,1 form) language but I am intended to show it in ASCII or Alphanumeric characters. Is there any possibility to show it or is there anyone to tell me such tool to convert binary form into ASCII form or alphanumeric form? then please respond me asap.

~With regards
Priyanka Singh

 

[TrickyDicky]

I dont understand what you mean? Are you looking at the waveform? or do you have some text file output from your testbench? Are you just looking to see the values in hex rather than binary?

 

[priyanka22]

not in Hex. I want see the output on testbench in characters not in binary.

 

[TrickyDicky]

thats down to how you write the testbench. You can do alot of stuff with your code and write however you want.
SO - are you using VHDL or Verilog?
What have you written so far?
what exactly are you trying to do.

 

[priyanka22]

yes I have written the code in VHDL and all it's data type can take only '0' & '1' form nothing else.