snoop835
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Hi everyone.
I am currently designing R2R 8-bits DAC. Now I want to simulate the DAC static performance i.e. offset error, gain error, INL and DNL. What I did was, I generated an ideal 8-bit DAC and compared the transfer slope to the actual DAC (ideal DAC slope vs actual DAC slope). From this I can directly measure INL/DNL/Offset?Gain Error. However I'm not sure whether this is the correct way of doing it!
Can anybody consult me on this problem.
CHEERS.......................
I am currently designing R2R 8-bits DAC. Now I want to simulate the DAC static performance i.e. offset error, gain error, INL and DNL. What I did was, I generated an ideal 8-bit DAC and compared the transfer slope to the actual DAC (ideal DAC slope vs actual DAC slope). From this I can directly measure INL/DNL/Offset?Gain Error. However I'm not sure whether this is the correct way of doing it!
Can anybody consult me on this problem.
CHEERS.......................