Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

simulation and synthesis in VHDL

Status
Not open for further replies.
Be more specific..
Answer to above question:Simulation-> Use modelsim..Synthesis-> Use ISE or VIVADO or DC Compiler...
 

How to do simulation and synthesis in VHDL

I believe the answer for your question is simple. You need to google it or see some videos where you have the convenience of copying and pasting the code in your compiler and then do the simulations.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top