Simulating an Integrator in LTspice

[juz_ad]

Hello,

Can anyone explain the behaviour of this integrator simulation - it's not as I expected.

There is an active and a passive integrator, they both use a +/-5V square wave @ 100Hz as the input.

The output of the passive integrator is doing what I expected - but the output of the active integrator swings down between the negative rail and 0V - why is this?



I also notice that if I use a 100Hz Sine as the input - the signal goes straight to 0V to -12V - why is this?



Thanks!

 

[_Eduardo_]

Can anyone explain the behaviour of this integrator simulation - it's not as I expected.

- What is the transfer function for those integrators? Are the same?

- For the active integrator: What happen when the a small current flow through the OA input?

 

[keith1200rs]

What is the opamp you are using?

Keith

 

[juz_ad]

- What is the transfer function for those integrators? Are the same?

Sorry, I don't know how to calculate that.

For the active integrator: What happen when the a small current flow through the OA input?

Putting a 1V PP square wave through has exactly the same effect except the waveform is much lower amplitude and it takes longer to fall to the negative rail.

- - - Updated - - -

What is the opamp you are using?

UniversalOpamp2

 

[keith1200rs]

I don't know what "UniversalOpamp2" is but I would suggest using something with known characteristics because the input bias current will affect the performance of an integrator.

Keith

 

[LvW]

Hello,
Can anyone explain the behaviour of this integrator simulation - it's not as I expected.
There is an active and a passive integrator, they both use a +/-5V square wave @ 100Hz as the input.
The output of the passive integrator is doing what I expected - but the output of the active integrator swings down between the negative rail and 0V - why is this?

You shouldn`t forget that the active integrator circuit is an INVERTING integrator. Thus, everything looks good and as expected (as far as I can see).
Moreover, the integrating function (active circuit) is limited due to the supply rail (maximum possible negative output voltage).
Please note, in addition, that the passive circuit shows the expected step response for a LOWPASS. this circuit can be regarded as an integrating device for very high signals only (very far beyond the 3-dB edge)

 

[juz_ad]

Thus, everything looks good and as expected (as far as I can see).

So the output swinging down to the negative rail is normal?

From an input that is centred around 0V (+/- 5V - with an equal mark/space ratio) I expected the output to be centred around 0V as well?

I don't understand why - regardless of the amplitude of the input - the output wants to head south?

Thanks.

 

[FvM]

There are two points you apparently didn't consider:

- initial solution in transient analysis
- symmetry of generator waveforms

The sine input integrator is showing effectively ideal integrator behaviour according to the characteristic of the universal OP model. You get exactly the shown out1 waveform for an initial value of zero. Integrate the sine input by pencil-and-paper method and see, why the output has a negative bias.

With the square generator, the integrator is initialized in positive saturation because the initial input voltage is negative. But the square wave isn't exactly symmetrical (due to a small finite rise and fall time), causing a slow drift and negative clipping. You can change the behaviour by adjusting VPULSE and .tran parameters.

A real integrator would show arbitrary output DC bias without suitable means to control the level. e.g. implementation as a lossy integrator, overall DC feedback or a periodical reset.

 

[juz_ad]

Seems I need to re-phrase my question...



I've set the input waveform to have a rise/fall rate of 0.00001s.

This shows a +/-1.12 V input at 5Hz pretty closely centred around 0V - like I would expect...

...but when I change the amplitude of the input waveform it changes both the amplitude - and the bias point - of the output waveform.

For a 0.1 V input I get a 2V PP output centred around 11V. For a 0.5 V input I get a 10V PP output centred around 7V.

What causes that change in bias when there is no change in the bias or the mark/space ratio of the input waveform?

Thanks - appreciated.

 

[FvM]

Presumed, you managed to generate a relative symmetrical input, then the integrator will keep the bias set by the initial transient solution.

In the present case, it's a starting point for V(out1) in saturation. The output waveform simply starts from this point. You can activate the "skip initial transient solution"-option to make the output voltage start from zero. Or apply arbitrary .IC statements, review the LTSpice help how to.

 

[crutschow]

As FvM noted the sine wave output is offset due to the starting point of the AC waveform. For example if you add a 90° phase shift (Phi) to the sinewave then the output will be centered around 0V.

 

[FvM]

For example if you add a 90° phase shift (Phi) to the sinewave then the output will be centered around 0V.

You need to activate the .uic option or apply an initial condition, too. Otherwise the initial voltage would cause an integrator starting point in saturation.

To modify the circuit towards real integrator hardware, you can e.g. add a reset switch across the capacitor that's opened at t=0.

 

[crutschow]

You need to activate the .uic option or apply an initial condition, too. Otherwise the initial voltage would cause an integrator starting point in saturation.

...................

That's true. I forgot that I had added the .uic to my simulation transient analysis while I was experimenting with it.