Hi!
I'm trying to simulate the transient behaviour of a PLL in ADS, using the in-built PLL behavioural components ("VCO", "PhaseFreqDetCP", etc.).
I would like to simulate load pulling, i.e. how the VCO/PLL will respond when the VCO load changes. Is this possible?
I guess that, since the model is behavioural, it will not take into account how a changed load would affect the VCO? Especially since I guess how a VCO responds to load pulling will vary between different VCOs. Do I need to use a transistor-level VCO model then, or can I somehow try to "mimic" the effect load pulling would have, without using a transistor-level VCO?
Thanks in advance for any thoughts on the matter.
Best regards,
Martin