Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] Simplification truth table

Status
Not open for further replies.

Carlos5Pierros

Newbie level 4
Joined
Feb 16, 2021
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
37
Hi I am not sure about my result so I would like to ask you if you can correct me. the circuit is composed of a counter and its outputs enter a combinational logic block. And it is this block that I am trying to simplify.

counter | outputs Q
CBA | 1 2
-----------------
000 0 0
001 1 1
010 0 1
011 1 1
100 0 0
101 1 0

Q1 is simple is equal to output A
But Q2 is more complex look what I understand..

Q2 = /C * /B * A + /C * B * /A + /C * B * A

Simplified équation

Q2 = /C * A + /C * B

Thank for your time. I hope that is clear enough.
 

Hi,

There are just 6 out of 8 rows. What's with the remaining two?

Klaus
 

Hi,

There are just 6 out of 8 rows. What's with the remaining two?

Klaus

Indeed I forgot to say that I will use a counter which I will clear at 0110. Does that answer your question?
 

    KlausST

    Points: 0
    Just a test .... regarding your PM
Hi,

I'm not really seeing your formulas in those results, but that's just me.

Please post a schematic of the circuit described in post #1, please. It might help somewhat.
--- Updated ---

In my way of expressing it, I see:

Q1 = A + B(don't care) + C (don't care)
Q2
= !C + A OR B

Or, put differently:

Q1 = A + !B + !C OR A + B + !C OR A + !B + C
Q2
= A + !B + !C OR !A + B + !C OR A + B + !C

So:

Q1 = A, and Q2 = !C + A OR B

Is that what you mean?
--- Updated ---

Hi again,

This is my (clumsy) interpretation of one way of achieving the required goals with standard logic gates, as far as I have understood how you wish to implement it. Maybe there is a simpler solution, or maybe this is not how you need the inputs/outputs to be configured.

If I understood the functions correctly, Q1 = A can be a single in/single out path because B and C inputs are irrelevant (don't cares); Q2 = (!C + A OR B) needs to OR A and B inputs into an AND gate that only goes high in combination with !C (i.e. input C has to be low but inputs A and/or B must be high for Q2 to be high):

EDABOARD LOGIC A AND NOTC Q1 Q2 OPTION.JPG

--- Updated ---

And hi, again,

Trying to think of a simpler solution/less parts, in principle, NOR gates seem a nice option. Same idea as previous schematics but only two quad packages and/or no (irritating) mixed logic and unused gates. You would need to check/think through that it really does fulfil the required functions - considered briefly, it seems to me it can. I'm sure there may be an even simpler solution.

EDABOARD LOGIC A AND NOTC Q1 Q2 OPTION V2.JPG
 
Last edited:
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top