Hi
i am trying to simulate a very basic switched capacitor circuit in Virtuoso using a macro op apm model. But when i simulate, as you see in the picture
in DC analysis there is very big offset in the output.
and in transient analysis there is an error: no DC convergence
I think my problem is the op amp variables that i have to set up correctly but i don't know if I am right.
my input sin wave has a freq. of 1 KHz
my switches are sampling with f = 4 KHz.
op amp variables:
open loop gain: 10000
GBW: 160 MHZ
negative supply current: 100u
positive supply current: 100 u
out put voltage swing: +- 1.2
nominal supply voltage: 1.2
I am not familiar with Virtuoso.
Nevertheless. two comments are to be made:
1.) The circuit cannot work with singel supply as you have no unity gain feedback for dc. That means there is no operating point in the linear region for the opamp .
2.) What do you expect from a dc analysis of a time variant (clocked) circuit ?
thank you
1- but what should i do to make it works?
2- By the dc analysis I just want to check the output offset at the op-amp that should be reasonable at any time sample.
thank you
1- but what should i do to make it works?
2- By the dc analysis I just want to check the output offset at the op-amp that should be reasonable at any time sample.
1.) Use split power supply. That´s normal for S/C circuits.
2.) Of course, dc analysis doesn´t work for sampled data systems. Instead, you must use tran analysis.
Even when I use the separate power supplies (+1.2v & -1.2 v) it has the same problem. I understand what you mean and it doesn't really make sense to use DC analysis for the clocked circuits and I do the trans. analysis as well but yet in the DC analysis I shouldn't see the 959V at my output and that's the reason I don't have my proper output in the trans. as well.