Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Signal Integrity Engineers : Opportunity with US Fortune MNC

Status
Not open for further replies.

akumares

Newbie level 1
Joined
May 17, 2011
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,306
CISCO is looking for signal integrity engineers. The positions are located in Bangalore India. The job description is given below.


Job Description:
CISCO , bangalore seeks a Hardware / Signal Integrity Engineer with specialized knowledge in High Speed Design (HSD).
The candidate will be responsible for design and analysis of high speed interfaces and power distribution networks.
The candidate will work as part of a central Signal Integrity team participating in designing ASIC, package, chip, printed circuit board (PCB), and system interconnects.
Interacts directly with system architects, logic designers, ASIC engineers, CAD engineers and other SI engineers.

This group works on present and next-generation products and supporting development sites in the US, India within CRBU
Projects span the range from high volume, cost-sensitive systems to the latest high-technology, high-complexity applications.

Responsibilities will include but are not be limited to:

- Design and analysis of multi-gigabit serial links

- Electromagnetic modeling of complex 3-dimensional structures

- Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs

- Generating and verifying PCB layout rules

- Working directly with ASIC and PCB design teams to evaluate design tradeoffs and optimize design performance / risk / cost / manufacturability

- Performing static timing and signal integrity analysis of parallel (common clock, source-synchronous) interfaces

- Modeling and analyzing power delivery networks

- Performing physical measurements to collect data for design validation and simulation correlations

- Making recommendations on processes to improve capabilities and increase efficiency



Skills required

- Mastery of entry-level signal integrity tools
- Extensive experience with Synopsys HSpice for both time and frequency domain circuit simulation
- Strong manual static timing analysis skills
- Well versed in at least one 3-D field solver (CST Microwave Studio, Ansoft HFSS)
- Extensive experience with I/O selection and simulation/validation
- Self-motivation, teamwork and strong communication skills are essential
- Ability to define a project schedule and requirements, then deliver to that schedule
- Ability to work with distributed teams is essential
- Strong lab skills and measurement experience are required
- In depth understanding of electromagnetic theory is required
- Ability to quickly master new design tools and define optimized processes for design analysis



Educational Background
Minimum BSEE/CS/BE/B.Tech combined with 5-15 years of high speed design experience .

Work location : bangalore

Those interested may apply to akumaresatciscodotcom
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top