Hi
To store n bit data in shift register
you need n pulses of the clock;
whereas to take out n bit data you need n-1 pulses of clock.
What is the reason for the diference?
thanks
Think of a 1-bit SR, which is just a single ff. After 1 clock the input data appears on the output. You need one clock to get the data in, but no clocks to get the data out.
Think of a 1-bit SR, which is just a single ff. After 1 clock the input data appears on the output. You need one clock to get the data in, but no clocks to get the data out.
That pretty much depends on how you define “take out the data”. The data is AVAILABLE after one clock. You are assuming that you need to clock that data into something else. What if you just need the data as the input to a logic gate?