just type 'man setDesignMode' and read the description. you have to do it before any extraction, which means before any timing is calculated, which means before placement
technology is never inferred from LEF. the default is assumed to be 90nm.
As per the process number , the tool will set the coupling capacitance threshold values accordingly in the background. design mode and analysis mode are to be set by us.
As per the process number , the tool will set the coupling capacitance threshold values accordingly in the background. design mode and analysis mode are to be set by us.
This means it's fine if I set the design mode just before RC extraction or I'll have to re-design the layout if I didn't specify it from the beginning ?
This means it's fine if I set the design mode just before RC extraction or I'll have to re-design the layout if I didn't specify it from the beginning ?
see my answer above. it potentially affects everything that uses timing, including placement. you might have under/over designed, and then compensated later. your layout could be right and functional, but it might be a notch under optimal.