Hi,
When is it necessary to use serpentine routing to match the length between different traces (e.g. databus and addressbus)?
Is there a common formula to calculate the length missmatch between (e.g. D0 and D7) using serpentine routing?
In my case, the processor is running at 100MHz / rise time and fall time is 2ns and should be connected to an SRAM interface. Maybe it`s too slow to thing about such things, but it would be very helpful to know the basics and the calculations of such things... By the way, I`m not in the position to use any kind of simulation tools.
Perhaps someone know a good application note, pdf or book about these things.
best regards
Step100