Series termination selection for oscillator output pim

[vaibhavwaman]

I am using IC oscillator for microcontroller clock input. there due to harmonics of oscilltor we have observed failure in radiated emission level test. after adding 47Ohm of series termination resistor we have passed the radiated emission test. I want to prove this theoratically using mathematical model. what theory should I use to make this calculation ? Is thumb rule of rise time related to this ? How I make sure that this rise time (slightly damped) after adding 47Ohm series termination is not issue ?

 

[betwixt]

Most likely, assuming you are using a carbon resistor or you have simply made an RC low pass filter with the 'C' being whatever is on the microcontroller side, including the microcontroller itself.

Brian.

 

[FvM]

The series resistor could be also considered as source side termination for the open ended transmission line between oscillator and uC, particularly if the trace has some length. We are generally using it for fast single ended CMOS signals to prevent multiple reflections running back and forth the line. The resistor also prevents voltage overshoot at the far end. Ideally the sum of oscillator output impedance and resistor should match the trace impedance of e.g. 60 to 70 ohm.

If we observe radiated emissions due non-optimal ground return for the clock signal, a stronger filtering of the clock could be considered. With a well chosen ferrite bead, the waveform can be even changed to quasi sine wave which would be still accepted by the uC clock input.

 

[dick_freebird]

A well matched line will have the least time-of-flight ringing on
edges. The floor will be the output signal's true harmonic content,
to which any line ringing is a "bonus" (not a good one).

 

[D.A.(Tony)Stewart]

It is very easy to dampen all CMOS ringing with a series resistor with a slight increase in risetime or latency. I can simulate the response easily in Falstad using Vol/Io=Zo for the logic device. (typ 22~25 ohms +/-33% for 5.5V logic) and estimate each trace length and Cin load or use a single sqrt(L/C) for the trace impedance and line length with total C load. It is also easy to estimate the Q or ζ, damping factor. As others have said significant ringing can be achieved with 50 to 82 ohm - Rs added and all overshoot can be eliminated with a ζ=0.7. PCB tracks are often much higher than 50 ohms with very thin tracks much smaller than the dielectric thickness to a ground plane, which raises the Zo and much higher with no ground plane

Matching the source prevents the normal high impedance load reflections from ringing. If say a 220 to 1K load is applied some ringing can be reduced, but it is far more effective to match the source as the current is only significant during the transition. Matching the load to the T-line increases the CMOS load internal bias currents and amplitude margin reduces 50%. So matching the source is most effective..

1ns delay line 220 ohms

almost matched