So I have been given verilog source code which is completely sequential (everything inside always @(posedge) block). I am required to convert this code into combinatorial, and sequential, convert the logic to combinatorial, and use sequential only to add flip flops between outputs of one part of the logic to the input of next part of combinatorial logic. How should i go about doing this conversion, are there any set of rules??
The functionality should remain the same, right now all the logic is inside the sequential block, after conversion the logic should be inside the combinatorial block while the sequential block should only contain flip flops
Do you mean that right now you have an always@(posedge ..) block having all the logic within it which you need to convert into a combinational block and still retain the original always block?
If that is the case take the logic out of the original block and transfer it to another always@(*) block or accomplish the same using assign statement/conditional operator. Take the output of this logic into another always@(posedge...) block and drive the original bus.