Sequential FIR Filter verilog, execute all 64 computations

[hrishi24h]

Hello,

I have 64-tap parallel FIR filter designed in verilog. and I want to convert it into sequential FIR filter i.e. I want to execute all 64 computations on single MAC unit.

I took 64 co-efficients and multiplied it with input sample using for loop but didnt work.

I am new to verilog.

Does anybody know how to do it??

Thanks,
Hrishi

 

[vipinlal]

Sequential FIR Filter

I will talk from a VHDL point of view.
Dont use for loop.I think if you do the MAC operations inside an always statement then it should synthesis only one MAC. Instead of for loop use an 'if' statement for doing the operation for 64 times.
Check this link(Related to VHDL..)
https://vhdlguru.blogspot.com/2010/03/how-to-do-clocked-for-loop.html

--vipin
https://vhdlguru.blogspot.com/

 

[hrishi24h]

Re: Sequential FIR Filter

Thank you very much.
Its working and I got the idea as well.