sending I2C sequence in EFR32FG14

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Hello , i am trying to send data from master to slave with ACK from slave in between.
by previos SPI expirience we can use I2C->TXDATA register to send data but i dont know how to handle the recieving of acklowlednge from the slave.
In SPI for the slave to respond we need to send extra dummy bits to genrate clock,What should i do in the I2C case here?

Thanks.




 

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Hi,

Generally keep on the datasheet of the target.

But you hide the target´s name, you did not post a link to it´s datasheet.

Also you need to read I2C specification - at least to understand basic data transfer.
And you need to read microcontroller specification.
If you are using any I2C libraries, then you need to read it´s documentation.

****
It´s impossible to help without knowing about your IDE, libraries, language....

Klaus
 

Hello Klauss,currently i using the reference manual of efr32 chapter 17 page 519 on the list shown bellow


Also i am trying to use the API shown bellow


i am trying to start with small to send data from master and recieve acklowledge,but as you tought me on SPI i need to send extra dummy bits for that.
What should be done in I2c to get a respond?
Thanks.
 

Hi,

sending ACK/NACK is a mandatory part of the I2C protocol (not to compare with SPI redeive of data), thus the I2C periferal will handle ACK/NACK (not the application). Ther periferal interface will send the clocks and receive the ACK state, but the application needs to decide what to do with this information.

See section 17.3.7.5 Master transmitter.

Klaus
 

Hello Klauss, I think i understood the transmitting part regarding the registers,its I2cn_CMD to send STOP START and I2Cn_TXDATA to send the address and commands.
But there is a problem regarding the recieving of the data.
from the diagram shwn bellow slave sends back ACK , clock streching ,MSB and LBS byte
With I2Cn_if page 516 ACK bit i can see if ACK is being recieved
after that there is clock streching and MS_byte LS_byte I2Cn_RXDATA register to recieve .

With what register do i sense when the clock streching is over?
Does BUSHOLD flag in I2Cn_IF page 516 is the flag to monitor for clock streching?
Thanks


efr32fg14 reference manual 17.5.7 recieve page 512:
https://www.silabs.com/documents/public/reference-manuals/efr32xg14-rm.pdf

SI7021 sensor data sheet

 
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Hi,
Clock stretching is rarely used. Don't focus on it unless you use a device that needs it. I never needed it.

But I guess (don't know for sure) the I2C response will be delayed by the clock stretching time. This means if you use a blocking I2C transfer function, it will come back after clock stretching is over.

Klaus
 
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