vineethsukumar
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I was doing some project based on UVM.I have a DUT which is in Verilog.
I did "Genarate Post-Place & Route Simulation Model" in Xilinx ISE to generate SDF file and other files.
In modelsim all the files are compiled including the newly generated "my_design_timesim.v" in netgen\par folder.I copied all the UVM files into the Xilinx folder and compiled them also.
I compiled all the verilog libraries required.But when I am simulating he design using SDF file it is showing some error.I am attaching the do file commands and errors below.
NB:test name is specified inside my_top.
vmap simprim C:/Xilinx/14.7/ISE_DS/ISE/verilog/src
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/simprims/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/iSE/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/uni9000/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/unimacro/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/unisims/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/XilinxCoreLib/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/glbl.v
vlog netgen/par/my_design_timesim.v
vsim -sdfmax /ast0=netgen/par/my_design_timesim.sdf work.my_top work.glbl
where ast0 is the instance name in my_top
The errors are
Loading instances from netgen/par/my_design_timesim.sdf
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(227): Failed to find INSTANCE '\N0.A5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(1734): Failed to find INSTANCE '\N1.C5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(1324): Failed to find INSTANCE '\N1_10.B5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(1347): Failed to find INSTANCE '\N1_11.A5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(958): Failed to find INSTANCE '\N1_12.D5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(1077): Failed to find INSTANCE '\N1_13.C5LUT '.
..............................
Loading C:/questasim_10.2c/uvm-1.1d\win32\uvm_dpi.dll
Error: (vsim-SDF-3445) Failed to parse SDF file "netgen/par/my_design_timesim.sdf".
Time: 0 ps Iteration: 0 Instance: /my_top File: TOP/my_top.sv
There are more errors in the dotted portion.Everything saying Failed to find INSTANCE.Last it shows he portion after the dotted line.
What could be the possible issue and how to solve it??
I did "Genarate Post-Place & Route Simulation Model" in Xilinx ISE to generate SDF file and other files.
In modelsim all the files are compiled including the newly generated "my_design_timesim.v" in netgen\par folder.I copied all the UVM files into the Xilinx folder and compiled them also.
I compiled all the verilog libraries required.But when I am simulating he design using SDF file it is showing some error.I am attaching the do file commands and errors below.
NB:test name is specified inside my_top.
vmap simprim C:/Xilinx/14.7/ISE_DS/ISE/verilog/src
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/simprims/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/iSE/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/uni9000/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/unimacro/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/unisims/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/XilinxCoreLib/*.v
vlog C:/Xilinx/14.7/ISE_DS/ISE/verilog/src/glbl.v
vlog netgen/par/my_design_timesim.v
vsim -sdfmax /ast0=netgen/par/my_design_timesim.sdf work.my_top work.glbl
where ast0 is the instance name in my_top
The errors are
Loading instances from netgen/par/my_design_timesim.sdf
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(227): Failed to find INSTANCE '\N0.A5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(1734): Failed to find INSTANCE '\N1.C5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(1324): Failed to find INSTANCE '\N1_10.B5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(1347): Failed to find INSTANCE '\N1_11.A5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(958): Failed to find INSTANCE '\N1_12.D5LUT '.
Error: (vsim-SDF-3250) netgen/par/my_design_timesim.sdf(1077): Failed to find INSTANCE '\N1_13.C5LUT '.
..............................
Loading C:/questasim_10.2c/uvm-1.1d\win32\uvm_dpi.dll
Error: (vsim-SDF-3445) Failed to parse SDF file "netgen/par/my_design_timesim.sdf".
Time: 0 ps Iteration: 0 Instance: /my_top File: TOP/my_top.sv
There are more errors in the dotted portion.Everything saying Failed to find INSTANCE.Last it shows he portion after the dotted line.
What could be the possible issue and how to solve it??