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[51] SD Memory interface

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Debasis Swain

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Dear friends,
from last 15 days i am trying to initialize an SD memory with AT89S8252(11.0592mhz) using SPI communication but there is no result.My logics are given below

1- spcr=52h
2- CS lines to logic value 1
3- Toggle SD CLK for at least 80 cycles.
4-CS low
5- send CMD0 with complete frame (40h, 00h, 00h, 00h, 00h, 95h)
6-Then toggle SD CLK for 8 cycle
7- then check the response by spdr=01h or not, if not
8- then toggle SD CLK for 8 cycle and check again for the response(01h)
and continue this process up to 64 clk cycle and check the response after every 8 clk cycle but there no response.
Any body can give suggestion for this.
 

Debasis Swain

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Thanks for your suggestion but already i have seen this document and done the program with assembly language accordingly but no result.
 

KlausST

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Hi,

your description is not very informative.

A schematic and the complete ASM program may help to identify the problem.

Also we need to know the response data of the device (your steps 7 and 8).

Klaus
 

Debasis Swain

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schematic.gif

View attachment sd.txt


Code ASM - [expand]
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;******************************************************************
; To initialize the SD/SDHC card in SPI mode
 
;******************************************************************
SPCR                    DATA                    0D5H
SPSR                    DATA                    0AAH
SPDR                    DATA                    086H
 
 
SS                      BIT                     P1.4    
MOSI                    BIT                     P1.5
MISO                    BIT                     P1.6
SCK                     BIT                     P1.7
 
                        ORG                     00H
                        SJMP                    MAIN
                        ORG                     30H
 
MAIN:           MOV                     30H,#00                         ;indication
                        
                        LCALL           DELAY                           ;to ready the hardware
                        LCALL           RESET
                        LCALL           SPI_DELAY
 
                        
                        LCALL           SPI_MODE
                        
                        LCALL           RESPONSE
                        SJMP                    $
 
;-----------------------------------------------------------------------------;
;------------------- SPI MODE-------------------------------------------------;
;-----------------------------------------------------------------------------;
SPI_MODE:               CLR                     SS
                        ;LCALL          SPI_DELAY1
                        
                        CLR                     A
                        MOV                     A,#40H          ;6TH BYTE
                        LCALL           SPI_WRITE
                        CLR                     A
                        MOV                     A,#00H          ;5TH BYTE
                        LCALL           SPI_WRITE
                        CLR                     A
                        MOV                     A,#00H
                        LCALL           SPI_WRITE               ;4TH BYTE
                        CLR                     A
                        MOV                     A,#00H
                        LCALL           SPI_WRITE               ;3RD BYTE
                        CLR                     A
                        MOV                     A,#00H
                        LCALL           SPI_WRITE               ;2ND BYTE
                        CLR                     A
                        MOV                     A,#95H
                        LCALL           SPI_WRITE               ;1ST BYTE
                        RET
                        ;CLR                    A
;-----------------------------------------------------------------------------;
;--------------------RESPONSE-------------------------------------------------;
;-----------------------------------------------------------------------------;
                        
RESPONSE:               
                        CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        
                        CJNE                    A,#01H,AGAIN
                        CLR                     P2.0
                        SETB                    SS
                        RET
 
AGAIN:          
                        CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        
                        CJNE                    A,#01H,AGAIN2
                        CLR                     P2.0
                        SETB                    SS
                        RET             
                        
 
 
AGAIN2:         
                        CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        
                        CJNE                    A,#01H,AGAIN3
                        CLR                     P2.0
                        SETB                    SS
                        RET     
 
AGAIN3: 
                        CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        
                        CJNE                    A,#01H,AGAIN4
                        CLR                     P2.0
                        SETB                    SS
                        RET     
 
AGAIN4:         
                        CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        
                        CJNE                    A,#01H,AGAIN5
                        CLR                     P2.0
                        SETB                    SS
                        RET     
 
 
 
AGAIN5:         CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        
                        CJNE                    A,#01H,AGAIN6
                        CLR                     P2.0
                        SETB                    SS
                        RET     
 
AGAIN6:         CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        
                        CJNE                    A,#01H,AGAIN7
                        CLR                     P2.0
                        SETB                    SS
                        RET     
 
AGAIN7:         CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        
                        CJNE                    A,#01H,AGAIN8
                        CLR                     P2.0
                        SETB                    SS
                        RET     
                        ;SETB                   SS
                        ;RET
;--------------------------------------------------------------------
 
AGAIN8:         
 
;----------------------------------------------------------------------
                        CLR                     A
                        MOV                     A,#40H          ;6TH BYTE
                        LCALL           SPI_WRITE
                        CLR                     A
                        MOV                     A,#00H          ;5TH BYTE
                        LCALL           SPI_WRITE
                        CLR                     A
                        MOV                     A,#00H
                        LCALL           SPI_WRITE               ;4TH BYTE
                        CLR                     A
                        MOV                     A,#00H
                        LCALL           SPI_WRITE               ;3RD BYTE
                        CLR                     A
                        MOV                     A,#00H
                        LCALL           SPI_WRITE               ;2ND BYTE
                        CLR                     A
                        MOV                     A,#95H
                        LCALL           SPI_WRITE               ;1ST BYTE
                        LJMP                    RESPONSE
                                
                        
;-----------------------------------------------------------------------------;
;-------------------RESET SPI CHANNEL-----------------------------------------;
;-----------------------------------------------------------------------------;
RESET:          SETB                    SS
                        SETB                    MOSI
                        SETB                    MISO
                        ;SETB                   SCK
                        CLR                     SCK
                
                        MOV                     SPCR,#52H               ;ENABLES THE SPI CHANNEL,,,,,5CH
                                                                        ;disable interrupt,MSB first,master mode
                                                                        ;mode 1,1;fosc/64
                        MOV                     SPSR,#00H
                        RET
;-----------------------------------------------------------------------------;
;-------------- WRITING DATA THROUGH SPI PROTOCOL-----------------------------;
;-----------------------------------------------------------------------------;
SPI_WRITE:      ;CLR                    SS
                        MOV                     SPDR,A          ;DATA TO BE TRANSMITTED SHOULD BE LOADED IN DATA REGISTER
SPI_LOOP:               CLR                     A
                        MOV                     A,SPSR          ;GET THE STATUS
                        ANL                     A,#80H          ;TO CHECK THE SPIF FLAG (TRANSMIT OVER)
                        JZ                      SPI_LOOP
                        MOV                     A,SPDR
                        clr                     p1.0                    ;indication
                        RET             
 
;-----------------------------------------------------------------------------;
;-------------- WRITING DATA THROUGH SPI PROTOCOL-----------------------------;
;-----------------------------------------------------------------------------;
SPI_RECEIVE:    CLR                     A
                        MOV                     A,#0FFH
                        MOV                     SPDR,A          ;DATA TO BE TRANSMITTED SHOULD BE LOADED IN DATA REGISTER
                        LCALL           SPI_WRITE
                        
                        RET     
 
;-----------------------------------------------------------------------------;
;-----------------------------------------------------------------------------;
DELAY:          MOV                     30H,#255
HERE1:          MOV                     31H,#255
HERE:           MOV                     32H,#8
                        DJNZ                    32H,$
                        DJNZ                    31H,HERE
                        DJNZ                    30H,HERE1
                        RET
 
;-----------------------------------------------------------------------------;
;-----------------------------------------------------------------------------;
SPI_DELAY:      
                        MOV                     30H,#10
HERE2:          CLR                     A
                        MOV                     A,#0FFH
                        LCALL           SPI_WRITE
                        DJNZ                    30H,HERE2
                        RET
 
 
                        END



P1.4 connected with cs of SD memory
P1.5 connected with DI pin
P1.6 connected with DO pin
P1.7 connected with sclk pin

for your information I furnished the ckt diagram code.
 
Last edited by a moderator:

milan.rajik

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Pin 1.5 configures as input pin in code ?
 

Debasis Swain

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yes, p1.5 is output of mcu and connected with input of sd memory
 

KlausST

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Hi,

you didn´t answer what´s the response of the SD card.

What does a scope show? Are the levles and timings correct?

Klaus
 

Debasis Swain

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The SD card will respond to the reset command by sending a basic 8-bit response on the MISO line
If the command you sent was successfully received, then you will receive the message (00000001)2.
 

KlausST

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Hi,

If the command you sent was successfully received, then you will receive the message (00000001)2.
Yes, I know. This is how it should be.

But what do you really receive?
The "response" gives you 7 bits of error states...

Klaus
 

Debasis Swain

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Actually I receive only 0ffh.

- - - Updated - - -

Dear Klaus,
did you check my code.
 

KlausST

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Hi,

i had a quick view at your code.

But receiving FF tells me that there is no communication at all. At least the MSB should be "0".

I´d check the signals with a scope.
CS (trigger) and clock and data.

Usually at the data levels you see if the SDCARD ever tries to to send data. ie it becomes low impedance.

*****
In case you don´t have a scope: Dou you have any other SPI device instead of SDCARD?
A simple HC595 for example...

Hope this helps.

Klaus
 

Debasis Swain

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Here is a question arises that ?
All we know that the SD Card wakes up in the SD Bus mode. It will enter SPI mode if the CS signal is
asserted (negative) during the reception of the reset command (CMD0). So, how it will receive the CMD0 at 1st stage in SPI channel.
 

FvM

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I guess you didn't look at CMD protocol in SD mode. The pulse pattern for CMD and CLK lines is just the same in both modes. So CMD0 (no arguments) can be recognized independent of the mode.
 

Debasis Swain

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Tank you for your answer.
Now suggest me what is the problem in my communication with sd memory using AT89S8252 in SPI mode.
I have already submit my code with ckt design, Pls check it.
 

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Your initialization sequence is unclear in one point, it doesn't specify the data line level during "toggling SD CLK". It should be 1 (sending 0xFF).

The SDCard interface implementations I'm using are also sending one 0xFF byte in front of any command and using SPI mode 3 instead of 0.
 

Debasis Swain

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Sorry for late.

If you are telling about MOSI line then it is already define that "setb mosi" before toggling SD CLK.
 

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If you are telling about MOSI line then it is already define that "setb mosi" before toggling SD CLK.
??? You are driving the SPI lines through the dedicated SPI interface. As long as the SPI interface is activated, the port control register don't have any effect. You can only drive MOSI high by writing 0xFF to SPDR.
 

Debasis Swain

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Yes, it is right that as long as the SPI interface is activated, the port control register don't have any effect. So, that there is already define one function named as "SPI_DELAY" in which SPDR is written by 0xFF up to 80 CLK signal.
 

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