Can anyone please tell me what factors the saturation resistance in CE configuration depends upon?
It seems that Vce(sat) is fixed for a particular value of Ib...but I can't understand why this is so....afterall,in the saturation region,the value of Ib does not have any effect on value of Ic,so I guess the Vce(sat) should really be independnt of all factors...can anyone explain this?
I think the saturation voltage exists as the difference between the volts drop of the forward biased base-emitter junction and the base-collector junction. The base-collector junction has a lower drop so the collector cannot reach zero. If it tries, it reduces the base drive which prevents the collector dropping further.