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Saturable inductor in boost SMPS for noise reduction?

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Jun 22, 2008
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I would like to ask if any engineer knows how to get rid of the dreaded “spike” current which occurs in the FET current at switch ON in an SMPS boost converter?

I would like to gain opinions on the “saturable inductor” method of reducing said “spike” current.

Google appears to be extremely baron on this subject.

Boost converter schematic


Boost converter load current (LED current)


Here is the FET current, showing the “spike” current:


The “spike” current comes from the output capacitor(s)……it literally comes through the boost diode when the FET turns ON. (!)
(This “spike” current occurs no matter if the boost diode is Schottky or Ultra-Fast type. With Ultra-Fast diodes, its due to “reverse-recovery”, with Schottky’s its due to the Schottky capacitance)

Please note the EXTREME sharpness of this “spike” of current.

We don’t need to be Microwave Engineers to be able to see that this current “spike” is going to have STRONG harmonics up into the near GHz frequency range.

It is going to be a NIGHTMARE for our EMC compliance test.

I would suggestively state that this “spike” current is the main reason why SMPS’s often need to be shielded by surrounding them by a metal case.
(is this agreeable to yourself ?)

Also, I would preach that this “spike” current is the main causative factor behind the majority of common mode conducted emissions from the SMPS.
(is this also agreeable to yourself ?)

Please examine the “spike” again………just look at that phenominally high di/dt.(!)

..high di/dt means large amounts of energy will be coupled OUT of the circuit, causing common-mode conducted problems……the coupling will be via the circuit’s inevitable stray inductances and capacitances……..hence the EMC nightmare.

To make matters even WORSE…………….

This current “spiking” can be seen in ALL SMPS’s

….take a flyback….the “spike” simply comes through the transformer when the FET switches ON.

May I receive suggestions on the the following method to reduce this “spike”……

--Simply place a saturable inductor in series with the boost diode….

Saturable inductor (L4) in series with boost diode


As the FET switches ON and the “spike” tries to flow … meets the reactance of the (saturable) inductor… the spike cannot build up very quickly.

As you will know, it needs to be a SATURABLE inductor because otherwise it would impede current flow from the main moost inductor when the FET turns OFF.

That is, this inductor very quickly saturates… fact, it is a “square law” inductor, meaning that before it saturates, the gradient of its B-H curve is almost vertical (very steep)………it saturates very quickly and indeed saturation on the B-H curve is seen by the gradient SUDDENLY going from very steep vertically to very flat (horizontal). –it uses a special ferrite to give it this behaviour.

Can any engineer comment on the use of such a saturable inductor to stop this “spike” current?

My question is………..
… does one work out the maximum voltage that occurs across this inductor before it saturates.?
(i.e. what voltage occurs across the saturable inductor when the FET switches OFF)

it will be from i = Cdv/dt and v = Ldi/dt and dv/dt = L d^2i/dt^2, but does any reader have an App Note on this?

As said, the spike is caused by the rectifiers reverse recovery charge. The charge amount only depends on the rectifier type
and actual current, the peak current also on the MOSFET's switching speed. Typically schottky reverse recovery is the strongest
interference source present in SMPS, and often producing most of the radiated (above 30 MHZ) EMI.

I don't think that an inductor is a good solution. Did you check in simulation? It must cause additional losses in any case, particularly
increase the switching losses at MOSFET turn-off. At turn-on the saturated inductors stored energy is turned into losses too, in
addition to the reverse revcovery charge.

In your circuit, the spike amplitude is relative high, because you are using a large schottky diode at a low current level.
But basically, the trick in SMPS design is to keep the commutating currents inside a small geometry and don't allow it to
spread all over the PCB, e.g. by proving a local ground plane or node for the switcher. Using this precautions, SMPS EMI can be
kept below the limits with fair effort.

Thanks for replying,

though i have not yet simulated the saturable inductor as i haven't worked out if its possible to do a saturable inductor in LTSpice yet.

I am worried about getting a big voltage spike from the inductor before it saturates

I found, that LTSpice has a non-linear inductor model, that should be suitable, but I didn't use it.

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