Zerox100
Full Member level 6
riviera elite
Riviera-Elite is a complete ASIC/SoC graphical design and verification environment that supports mixed VHDL/Verilog and SystemC built for next generation system-level designers.
Beta version:
_http://www.aldec.com/Registration/(nnignwesgn3xri5541r24x45)/DAC/DAC2003.aspx
Riviera-Elite is a complete ASIC/SoC graphical design and verification environment that supports mixed VHDL/Verilog and SystemC built for next generation system-level designers.
Beta version:
_http://www.aldec.com/Registration/(nnignwesgn3xri5541r24x45)/DAC/DAC2003.aspx