If you look at the first image you sent, you can see that there is an oscillation that is trying to start but it is triangular. Therefore, one of the following things may be happening:
1) your accuracy specs are too loose. Use conservative setting, and default Itol, reltol and vtol.
2) You are heavily slew-rate limitted. This means you have either too much capacitive load or not enough current setting.
3) Insufficient gain in the loop so you are very slowly increasing the oscillation.
The gain of the output stage is gm*Rout. Your PMOS is definetally sized for a good Rout, but your NMOS is not. You may be too worried about slew rate and made your MOS wide, but instead you increased the capacitive load too much, lowered the output gain too much due to the low Rout of the NMOS and killed your gain. Try reducing the width of the NMOS by at least 5X and see what happens.
The other problem I see is that an oscillation seems to be building but it's analog. Increase your simulation time to be much longer to see what happens near the end. It does look like you may have insufficient gain.