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Ring oscillator power supply current increases with time

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pasindua

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I am working on designing a simple ring oscillator circuit in Cadence ICFB 5.141. I have designed a ring oscillator schematic with 15 inverters from NCSU_TechLib_ami06 library (0.6 um, 5 V). I performed a parametric sweep of power supply voltage (VDD) from 1 V to 5 V, while running 1 us transient simulations of the schematic design.

From the results of the simulation, I noticed that the power supply currents' (Ips) magnitudes for VDD=1 V,3 V, and 4 V are stable. However, for VDD=2 V and 5 V, Ips magnitude increases with time. For example, at VDD=2 V, magnitude of Ips increased from 100 uA to 24 mA along the 1 us simulation duration.

I am at a loss on how to explain this. First I suspected that may be the ring oscillator frequency is not stable and increases with time, causing Ips magnitude to increase. However, it seems that the oscillation frequency is stable. Can anyone help me to understand why this is happening?

Thanks in advance!
 

i think its due to the transcient nature of the digital circuit....

Please attach waveform if u can..

thanks
 

Drive strength follows signal swing and signal swing follows
drive strength; the higher the amplitude, the more the supply
current. All oscillators have a startup time during which
amplitude will change - it had better, starting from zero.

This might be all due to the varying initial condition / DC
solution. Start the thing jammed to zero and release it,
logic levels will be well established then, and see if a
consistent initial condition gives a consistent startup
behavior.
 

Drive strength follows signal swing and signal swing follows
drive strength; the higher the amplitude, the more the supply
current. All oscillators have a startup time during which
amplitude will change - it had better, starting from zero.

I get your point, but the signal swing doesn't change during the 1 us period. Its from 0 to VDD.

This might be all due to the varying initial condition / DC
solution. Start the thing jammed to zero and release it,
logic levels will be well established then, and see if a
consistent initial condition gives a consistent startup
behavior.

I already am setting the initial condition of the ring oscillator output to 0V. And as mentioned earlier, I am getting consistent output signal swing from the start.

An image of power supply current (Ips) graphs at different VDD levels is attached. Thanks for your replies. Let me know what you think.

 

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