hi, all
i designed a ring oscillator use 3 defferential input and defferential output one stage amplifier, and the post simulation shows the frequency does not exceed ± 8%.
but when it come from fourndry, the test result show that the frequecy is different from the post simulation results exceed 40%. some test show other block of the OSC is work normal. so can any one tell me what will influence the result so largely?
thanks!
Apparently, the simulation model doesn't match the real process. Or you forgot to consider parasitic parameters, particularly capacitances. It's a quite common problem, I think.
What kind of Extraction method you have used for post layout simulation? It should RC+CC extraction. Also, for the extraction, you might use RCMAX which is the worst case for extraction.
What is the frequency of oscillation? If it's high, then you might also include inductance in the extraction. By the way, if your foundry is good then the models should be good enough.