saikat
Member level 2
Hi,
I need to build a RGMII to SGMII bridge. I have used the "rgmii_v2_0_if.vhd" file available in one of the Ethernet MAC core source files generated from LogiCOre. But the data capturing is somehow not proper. For example, if there are 3 consecutive bytes, the receiver interface collects the bytes as (lower nibble of last byte & upper nibble of byte 1), (lower nibble of byte 1 & upper nibble of byte 2), (lower nibble of byte 2 & upper nibble of byte 3) etc. I.e. the nibble stream is shifted by one nibble position and hence my byte formation got corrupted. I have tried with setting the 20.1 and 20.7 register bits of MARVELL 88E1111 PHY but no luck. Also I have tried with changing the IODELAY taps.
I have succesfully made GMII to SGMII bridge and SGMII to SGMII bridge and face no problems. Can you help me in this problem?
I am attaching the "rgmii_v2_0_if.vhd" file for your reference.
Thanks,
Saikat
I need to build a RGMII to SGMII bridge. I have used the "rgmii_v2_0_if.vhd" file available in one of the Ethernet MAC core source files generated from LogiCOre. But the data capturing is somehow not proper. For example, if there are 3 consecutive bytes, the receiver interface collects the bytes as (lower nibble of last byte & upper nibble of byte 1), (lower nibble of byte 1 & upper nibble of byte 2), (lower nibble of byte 2 & upper nibble of byte 3) etc. I.e. the nibble stream is shifted by one nibble position and hence my byte formation got corrupted. I have tried with setting the 20.1 and 20.7 register bits of MARVELL 88E1111 PHY but no luck. Also I have tried with changing the IODELAY taps.
I have succesfully made GMII to SGMII bridge and SGMII to SGMII bridge and face no problems. Can you help me in this problem?
I am attaching the "rgmii_v2_0_if.vhd" file for your reference.
Thanks,
Saikat