Hi All,
I have the following specification for an RF power amplifer:
800MHz - 1GHz
+27 to +30 dBm
P 1dB compression point
S11=S22=14 dB
S12>40dB
S21>30dB
3V3,
DC input=3 Watts
output=500mW RF
Two stage amplifier
using BFG235 or CLY5(GaAs FET)
Does anyone know how to design this amplifer in Ansoft Designer using linear and non linear analysis??? Thank you very much in advance
I'm thinking single ended first stage and push-pull for second stage. Efficiency will be tight.
Assume ~75% of gain in first stage and calculate gain for each stage using your gain and P1dB requirements. Setup bias for 9, 10 or 12V to keep DC current down.
In Ansoft, match the output then match the input of each stage (lumped element). I see you do not have a noise figure specification. That makes life easier.
Breadboard and bolt together.
Combine matching circuit of first stage output with input match of second stage.