(RF PCB) Place GND VIA around the Microstrip line

[goatmxj666]

Hello RF PCB Experts

I have designed the input matching of an RF power amplifier with microstrip lines on a PCB as shown in the picture below. (The component in the middle is the capacitor footprint.)
My frequency is 2.4GHz.

I am designing a 3-layer PCB, the TOP layer is RF signal, the second layer is GND and the third layer is BOTTOM.

My question is, is it better to put a VIA around the RF signal line that goes through to GND as shown in the picture below, and if it is better to have a VIA, which one is better, "TOP-GND VIA" or TOP-BOTTOM through hole VIA?

It would be really helpful if you could let me know your experience.

 

[BigBoss]

Since the second layer is GND, Vias must be tied to GND.
You can also use through Vias by connecting to GND. Same thing..

 

[goatmxj666]

Since the second layer is GND, Vias must be tied to GND.
You can also use through Vias by connecting to GND. Same thing..

Thanks to your comment.

But I am designing a microstrip line.
Therefore the signal's electric field will be generated between the RF signal line(TOP layer) and GND plane.

So I wonder the additional VIAs (TOP-GND) around the microstrip line will be helpful for my signal? or does it give negative effect to my signal?

I heard the VIAs around the signal line will be helpful to reduce noise. But I don't know if this work for microstrip line as well.

 

[FvM]

Via "fences" will be used for coplanar strip with ground, not for microstrip. Depending on the distance, the vias in your sketch are reducing the microstrip impedance and should be considered in impedance calculation. At first sight they make no sense.

 

[goatmxj666]

Via "fences" will be used for coplanar strip with ground, not for microstrip. Depending on the distance, the vias in your sketch are reducing the microstrip impedance and should be considered in impedance calculation. At first sight they make no sense.

Thank you so much for your reply.

It really helped me a lot, I'll have to do the impedance matching without VIAs around it as I designed it initially.

Have a nice day!