In a three-terminal resistor element, the first and second terminals are connected to the resistor body, and conduct a DC current, while the third one is the "substrate" terminal, describing capacitive coupling between the resistor body and the well under the resistor. Conceptually, this third terminal is like a gate in a MOSFET, but in resistors, usually, their resistance does not depend on the voltage between the resistor body and the well.
I do not think that the capacitance of the resistor, in its compact model, depend on whether it is nwell or pwell or psubstrate underneath.
A thing to consider is what net you prefer that resistor body to substrate capacitance be connected to, to VSS or VDD.
I would suggest to check if the third terminal / instance pin is connected to R network of the VSS/VDD net, or directly shorted to the VSS/VDD port (if AC effects are important in this circuit).
Another option is to leave the well floating, under the resistor - this will reduce the capacitance (resistor capacitance to substrate will be in series with p-n junction between nwell and psub), but will make its potential undefined (floating) - sometimes, this may be a very bad thing, but sometimes - not.