Requirements for ADC SPI interface are quite different, e.g. high or low clock speed, addressable registers to serve, one or several output channels.
My suggestion is to write it from the scratch based on your specific needs.
- clock generation. for slow and medium speed, the clock is send from a register in your SPI interface, for high speed the system clock copied to SCLK
- frame generation, e.g. a state machine with a bit counter
- a shift register for SDI and SDO