Jan 30, 2007 #1 M mallikmarasu Member level 3 Joined Dec 21, 2006 Messages 58 Helped 3 Reputation 6 Reaction score 1 Trophy points 1,288 Activity points 1,703 hi, any one knows use of the user defined primitives in verilog
Jan 30, 2007 #2 rakesh_aadhimoolam Full Member level 4 Joined Mar 14, 2006 Messages 206 Helped 19 Reputation 38 Reaction score 2 Trophy points 1,298 Activity points 2,751 There is a chapter regarding this in Verilog HDL by Samir Palnitkar if you have the book go through that(Chapter 12) good luck.................
There is a chapter regarding this in Verilog HDL by Samir Palnitkar if you have the book go through that(Chapter 12) good luck.................