Hi,
I am planning to work with FPGA also: in case of FPGA, to which pin of FPGA, i have to connect that HALT pin of Jtag?
For CPLD:
Halt pin -- Open
Pgnd -- ? (what was this pseudo gnd? will have to connect to the supply gnd? )
gnd -- ? (will this is the supply gnd?)
For FPGA:
Halt pin -- (to which pin of FPGA, i have to connect this HALT of Jtag?)
Pgnd -- ? (what was this pseudo gnd? will have to connect to the supply gnd? )
gnd -- ? (will this is the supply gnd?)
Please let me know so that it will be useful for my PCB design
thanks,
V. Prakash