It would be grateful if anyone clears my two doubts
1) during ecos , assume that i have attached buffers to wrong sinks, ( i.e if A , B are sinks to a cell , but buffer is added to A , C ), then is this LVS failure or LEC failure. Which one will detect this error
2) a) "sometimes LVS can pass , but LEC can fail "
b) " sometimes lec can pass , but LVS can fail"
if it's a simple buffer - neither LVS nor LEC failure. More probably, you will get timing violation.
LVS failure - only in case netlist and topology are different (example: you will add buffer in netlist to one net and then manually draw this buffer in topology in another net)
LEC failure - buffer function is just ouput=input, so no difference exist buffer or not.
timing failure - max transition violation (because big capacitance of net and buffer is on another net; or additional delay due to internal buffer delay)
LVS failure only if you've added buffer to different sinks in netlist and layout (if you are using ECO tool capability, it is almost impossible, cause the tool is checking LVS automatically).