kavitha_bonthu
Junior Member level 3
Hello every body
I want to program external Synchronous dualport Ram through FPGA(xilinx)
We have tied thye CE(active low) to always low.
All other signal s are programmed correctly,still out put is not coming.
is it must to toggle CE.
We are using Cyprus Synchronous dualport Ram(512kx18).
I want to program external Synchronous dualport Ram through FPGA(xilinx)
We have tied thye CE(active low) to always low.
All other signal s are programmed correctly,still out put is not coming.
is it must to toggle CE.
We are using Cyprus Synchronous dualport Ram(512kx18).