Hello every body
I want to program external Synchronous dualport Ram through FPGA(xilinx)
We have tied thye CE(active low) to always low.
All other signal s are programmed correctly,still out put is not coming.
is it must to toggle CE.
We are using Cyprus Synchronous dualport Ram(512kx18).
I think problem is not with ce as i have interfaced a sram chip to fpga where the data sheet shows ce toggling and i have kept it low and still i was able to read and write data