Regarding current conveyors design

[riyaz.vlsi]

Hello frnds, I m working on TSMC 0.18um technology. I m stuck in design of my circuit. How to calculate the W/L ratio for second generation current conveyor (Image is attached). Is there any design technique to find W/L ratios in current conveyors ckt. How to proceed? (Let biasing current Ib1=50uA)

 

[egibson873]

It depends on what you are looking to accomplish. You generally start with what you want your impedance to be at nodes X and Y or what the speed of the conveyor needs to be.

Eric

 

[erikl]

How to proceed? (Let biasing current Ib1=50uA)

View attachment 104154

M5 .. M9 current sources all have the same W/L ratio, M10 .. M13 about a factor of 2..4 times larger W/L (depending on the µn/µp ratio of your technology). For M3, M4 I'd spend 10-times the W/L ratio of M5..M9, for M1, M2 10-times the W/L ratio of M10..M13.

For M14, M15 - @ IB2=IB1 - half the W/L ratio of M5..M9, for M16, M17 half the W/L ratio of M10..M13.

For good analog current mirroring behavior, I'd start with about L>≈5*Lmin, i.e. L=1µm.

Depending on silicon area consumption allowance, and circuit speed, you now have to select the original W/L of M5..M9: Let's try and start with an Inversion Coefficient IC=10 for the current mirror transistors, the transition between medium to strong inversion, which means a W/L ratio of about 10 for your bias current of 50µA in your 0.18µm tech. M1..M4 then would operate in medium inversion mode (IC≈1).

I'd think this is a good start. See if you can get it working right, means all transistors operate in saturation region for your input conditions.

If the circuit is too slow - or if your boss minds too large area consumption ;-) - scale down the original W/L ratios. Or scale down the length L a little bit. You could also play with the bias current - I think it's rather high. If you can meet your speed spec., you can scale down the bias current, and the W/L ratios correspondingly.

 

[riyaz.vlsi]

Thanks erikl sir, I got some idea from your reply, its really helpful to me. Sir, I have some confusion, is there any logic (or technical relation) behind to set W/L ratio of M3, M4 10-times the W/L ratio of M5..M9, and for for M1, M2 10-times the W/L ratio of M10..M13 and what is the criteria to select the inversion coefficient, how i know M1....M4 operate in medium IC.pls reply...

 

[erikl]

My suggestions rely on some experience. You have too many questions here, I can't educate you in analog CMOS design, sorry. Read the corresponding papers & books on gm/Id design methods!

 

[riyaz.vlsi]

ok, thanks sir.